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UCIe Consortium

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The UCIe Consortium is an industry consortium dedicated to advancing UCIe™ (Universal Chiplet Interconnect Express™) technology, an open industry standard that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level. UCIe Consortium is led by key industry leaders Advanced Semiconductor Engineering, Inc. (ASE), Alibaba, AMD, Arm, Google Cloud, Intel Corporation, Meta, Microsoft Corporation, NVIDIA, Qualcomm Incorporated, Samsung Electronics, and Taiwan Semiconductor Manufacturing Company. For more information, visit www.UCIexpress.org.

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Explore the usage models for UCIe technology - FMS 2023YouTube 影片
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UCIe Manageability and Software - FMS 2023YouTube 影片
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UCIe Protocol Overview - FMS 2023YouTube 影片
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Explore the usage models for UCIe technology - FMS 2023 縮圖

Explore the usage models for UCIe technology - FMS 2023

UCIe (Universal Chiplet Interconnect Express) addresses customer requests for a more customizable, package-level integration combining best-in-class die-to-die interconnect and protocol connections from an interoperable, multi-vendor ecosystem. UCIe supports two broad usage models. The first is a package level integration to deliver power-efficient and cost-effective performance. The second is to provide off-package connectivity using different types of media (e.g., optical, electrical cable, mmWave) using UCIe Retimers to transport the underlying protocols (e.g., PCIe, CXL) at the rack or even the pod level to enable resource pooling and sharing, and even message passing using load-store semantics beyond the node level to the rack/ pod level to derive better power-efficient and cost-effective performance at the edge and data centers. This presentation introduces the UCIe 1.0 specification and explores the usage models UCIe enables. Learn more: www.uciexpress.org

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UCIe Manageability and Software - FMS 2023 縮圖

UCIe Manageability and Software - FMS 2023

Founded in 2022, the UCIe Consortium is an industry Consortium dedicated to advancing UCIe (Universal Chiplet Interconnect Express) technology an open industry standard that defines the interconnect between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level. The UCIe 1.0 specification provides a complete standardized die-to-die interconnect with the physical layer, protocol stack, software model, and compliance testing. The specification leverages the established PCI Express (PCIe) and Compute Express Link (CXL) industry standards. It will enable end users to easily mix and match chiplet components from a multi-vendor ecosystem for System-on-Chip (SoC) construction, including customized SoC. This presentation will share a deep dive into the UCIe Manageability and Software. Learn more: www.uciexpress.org

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UCIe Protocol Overview - FMS 2023 縮圖

UCIe Protocol Overview - FMS 2023

This presentation provides an overview of the different layers of the UCIe stack, covering the functionality split between the different layers. Link protocol will be covered including main-band and sideband transfers, Link training, as well as a summary of supported Protocol mappings (PCIe/CXL/Streaming) and the corresponding Flit formats. Learn more: www.uciexpress.org

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Introduction to UCIe Tutorial: Software Manageability & Compliance 縮圖

Introduction to UCIe Tutorial: Software Manageability & Compliance

High-performance and power efficiency needs of emerging workloads demand on-package integration of heterogeneous processing units, memory, and electrical and optical interconnects. Applications such as artificial intelligence, machine learning, data analytics, 5G, automotive, and high-performance computing are driving these demands to meet the needs of cloud computing, intelligent edge, enterprise, client, and hand-held computing infrastructure. On-package interconnects are a critical component to deliver power-efficient performance with the right feature set in this evolving landscape. UCIe is an open industry standard with a fully specified stack that comprehends plug-and-play interoperability of chiplets on a package; similar to the seamless interoperability on board with well-established and successful off-package interconnect standards such PCI Express, Universal Serial Bus (USB), and Compute Express Link (CXL). In this tutorial, UCIe experts and spec developers will: • discuss the usages and key metrics of UCIe • delve into electrical, packaging, protocol, RAS, and software aspects along with the compliance and interoperability mechanisms. Learn more: www.uciexpress.org

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Introduction to UCIe Tutorial: UCIe Protocols 縮圖

Introduction to UCIe Tutorial: UCIe Protocols

High-performance and power efficiency needs of emerging workloads demand on-package integration of heterogeneous processing units, memory, and electrical and optical interconnects. Applications such as artificial intelligence, machine learning, data analytics, 5G, automotive, and high-performance computing are driving these demands to meet the needs of cloud computing, intelligent edge, enterprise, client, and hand-held computing infrastructure. On-package interconnects are a critical component to deliver power-efficient performance with the right feature set in this evolving landscape. UCIe is an open industry standard with a fully specified stack that comprehends plug-and-play interoperability of chiplets on a package; similar to the seamless interoperability on board with well-established and successful off-package interconnect standards such PCI Express, Universal Serial Bus (USB), and Compute Express Link (CXL). In this tutorial, UCIe experts and spec developers will: • discuss the usages and key metrics of UCIe • delve into electrical, packaging, protocol, RAS, and software aspects along with the compliance and interoperability mechanisms. Learn more: www.uciexpress.org

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Introduction to UCIe Tutorial: Electrical, Form Factor, and Compliance 縮圖

Introduction to UCIe Tutorial: Electrical, Form Factor, and Compliance

High-performance and power efficiency needs of emerging workloads demand on-package integration of heterogeneous processing units, memory, and electrical and optical interconnects. Applications such as artificial intelligence, machine learning, data analytics, 5G, automotive, and high-performance computing are driving these demands to meet the needs of cloud computing, intelligent edge, enterprise, client, and hand-held computing infrastructure. On-package interconnects are a critical component to deliver power-efficient performance with the right feature set in this evolving landscape. UCIe is an open industry standard with a fully specified stack that comprehends plug-and-play interoperability of chiplets on a package; similar to the seamless interoperability on board with well-established and successful off-package interconnect standards such PCI Express, Universal Serial Bus (USB), and Compute Express Link (CXL). In this tutorial, UCIe experts and spec developers will: • discuss the usages and key metrics of UCIe • delve into electrical, packaging, protocol, RAS, and software aspects along with the compliance and interoperability mechanisms. Learn more: www.uciexpress.org

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